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njg1515avb2 - 1 - tdma antenna switch gaas mm ic n general description n package outline njg1515avb2 is an antenna switch ic for a digital cellular phone of 800mhz and 1.5ghz band. the parallel control signals of three bits connect t/r circuits to internal two antennas or external two antennas. the termination ports with external matching circuits make low interference between diversity antennas. njg1515avb2 features very low insertion loss and low current consumption in a very small ssop20 package . n feature s l low voltage operation -2.5v ( tx only) and +3.5v l low current consumption 10ua typ. @ p in = 30dbm (transmit) 2ua typ. @p in =10dbm (receiving) l low insertion loss 0.5db typ. @ (tx-ant1 , tx-ext1) f =940m hz , p in = 30dbm 0.6db typ. @ (tx-ant1 , tx-ext1) f = 1453mhz , p in = 30dbm l low adjacent channel -63dbc typ. @v dd =+3.5v, v ss =-2.5v, f=940mhz, p in =30dbm leakage power -64dbc typ. @v dd =+3.5v, v ss =-2.5v, f=1453mhz, p in =30dbm l package ssop20-b2 (mount size: 6.4x5.0x1.25mm) n pin configuration njg1515avb2 pin connection 1. ctl2 2. ctl3 3. v ss 4. ext2 5. gnd 6. ext1 7. gnd 8. tx 9. gnd 10. ter2 11. ant1 12. gnd 13. rx 14. gnd 15. ant2 16. gnd 17. ter1 18. gnd 19. v dd 20. ctl1 vb2 type (top view) 1 2 3 4 6 7 8 9 1 0 5 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 a n t - s w de co rde r
njg1515avb2 - 2 - n absolute maximum rating s ( t a =25 c ) parameter symbol conditions ratings unit s supply v oltage 1 v dd v dd terminal 6.0 v supply v oltage 2 v ss v ss terminal -4.0 v control v oltage v ctr ctl1, ctl2, ctl3 each terminals 6.0 v tx, ant1, ext1 terminals 37 dbm input p ower p in rx, ant2, ext2 terminals 28 dbm power d issipation p d 600 mw operating t emp . t opr -40~85 c storage t emp . t stg -55~125 c n electrical characteristics 1 [dc characteristics] common conditions: t a =25 c , v dd =3.5v, v ss =-2.5v tx, rx, ant1, ant2, ext1, ext2: terminated (50 w ) ter1, ter2: connected to gnd by 5pf capacitors parameter symbol conditions min typ max unit s positive s upply v oltage v dd v dd terminal 2.7 3.5 5.0 v negative s upply v oltage v ss v ss terminal -3.5 -2.5 -2.0 v current c onsumption 1 i dd 1 v dd terminal no rf signal - 2.0 5. 0 ua current c onsumption 2 i ss 1 v ss terminal no rf signal - 0.1 - 0 ua current c onsumption 3 i dd 2 f=0.1 ~ 2ghz, p in =30dbm transmitting state - 10 30 ua current c onsumption 4 i ss 2 f=0.1 ~ 2ghz, p in =30dbm transmitting state - 30 - 10 - ua control v oltage (h) v ctl (h) c tl1, ctl2, ctl3 t erminals 2. 0 3.0 v dd v control v oltage (l) v ctl (l) ctl1, ctl2, ctl3 t erminals 0 0 0.6 v control c urrent i ctl ctl1, ctl2, ctl3=vdd or ctl1, ctl2, ctl3=0v -1. 3 - 1. 3 ua control terminal input impedance r in ctl1, ctl2, ctl3 e ach terminal 4 - - m w * the voltage of this terminal should be supplied before or same time with other dc supplying terminals. (ctl1~3, v ss ).
njg1515avb2 - 3 - n e lectrical characteristics 2 [ 800mhz tx mode ] common conditions: parameter symbol condition min typ max units frequency range 1 fin1 885 - 960 mhz tx-ant1 insertion loss los s 1 p in =30dbm - 0.5 0.65 db tx-ext1 insertion loss los s 2 p in =30dbm - 0.5 0.65 db tx-rx isolation isl1 p in =30dbm tx-ant1, tx-ext1 passing 24 29 - db tx-ant1 isolation isl2 p in =30dbm tx-ext1 passing 22 27 - db tx-ant2 isolation isl3 p in =30dbm tx-ant1, tx-ext1 passing 33 38 - db tx-ext1 isolation isl4 p in =30dbm tx-ant1 passing 21 26 - db tx-ext2 isolation isl5 p in =30dbm tx-ant1, tx-ext1 passing 32 37 - db pin at 0.5db compression point 1 p -0 .5db (1) tx-ant1, tx-ext1 passing 33 34 - dbm adjacent channel leakage power 1 acp1 pdc standard, 50khz offset p in =30dbm, input signal acp=-64dbc @30dbm - -63 -60 dbc adjacent channel leakage power 3 acp 2 pdc standard, 100khz offset p in =30dbm, input signal acp=-76dbc @30dbm - -74 -70 dbc 2nd harmonics 1 2f0(1) p in =30dbm, input signal 2nd harmonics=-68dbc - -63 -60 dbc 3rd harmonics 1 3f0(1) p in =30dbm, input signal 2nd harmonics=-69dbc - -63 -60 dbc vswr1 vswr1 tx-ant1, tx-ext1 passing - 1.3 1.5 switching time t d1 ctl1~3 - 120 500 nsec f=960mhz, t a =25 c , v dd =3.5v, v ss =-2.5v tested on pcb circuit as shown below. insertion loss of each connectors, striplines, and capacitors are excluded. tx, rx, ant1, ant2, ext1 and ext2 are terminated to 50 w . ter1 and ter2 are connected to gnd through 5pfcapacitor.
njg1515avb2 - 4 - n electrical characteristics 3 [ 800mhz rx mode ] common conditions: parameter symbol conditions min typ max units frequency range 2 fin2 810 - 885 mhz rx-ant1 insertion loss los s3 p in =10dbm - 0.65 0.80 db rx-ant2 insertion loss los s4 p in =10dbm - 0.60 0.75 db rx-ext1 insertion loss los s5 p in =10dbm - 0.70 0.85 db rx-ext2 insertion loss los s6 p in =10dbm - 0.65 .80 db rx-ant1 isolation isl6 p in =10dbm, rx-ant2, rx-ext1, rx-ext2 passing 21 24 - db rx-ant2 isolation isl7 p in =10dbm, rx-ant1, rx-ext1, rx-ext2 passing 22 25 - db rx-ext1 isolation isl8 p in =10dbm, rx-ant1, rx-ant2, rx-ext2 passing 22 25 - db rx-ext2 isolation isl9 p in =10dbm, rx-ant1, rx-ant2, rx-ext1 passing 20 23 - db pin at 1db compression point 1 p - 1 (1) rx-ant1, rx-ant2, rx-ext1, rx-ext2 passing 20 26 - dbm vswr 2 vswr2 rx-ant1, rx-ant2, rx-ext1, rx-ext2 passing - 1.4 1.6 switching time 2 t d2 ctl1~3 - 120 500 nsec f=885mhz, t a =25 c , v dd =3.5v, v ss =0v tested on pcb circuit as shown below insertion loss of each connectors, striplines, and capacitors are excluded. tx, rx, ant1, ant2, ext1 and ext2 are terminated to 50 w . ter1 and ter2 are connected to gnd through 5pfcapacitor.
njg1515avb2 - 5 - n electrical characteristics 4 [ 1.5ghz tx mode ] common condition: parameter symbol conditions min typ max units frequency range 3 fin3 1429 - 1453 mhz tx-ant1 insertion loss los s 7 p in =30dbm - 0.55 0.70 db tx-ext1 insertion loss los s 8 p in =30dbm - 0.65 0.80 db tx-rx isolation isl10 p in =30dbm tx-ant1, tx-ext1 passing 28 33 - db tx-ant1 isolation isl11 p in =30dbm tx-ext1 passing 30 35 - db tx-ant2 isolation isl12 p in =30dbm tx-ant1, tx-ext1 passing 30 35 - db tx-ext1 isolation isl13 p in =30dbm tx-ant1 passing 20 24 - db tx-ext2 isolation isl14 p in =30dbm tx-ant1, tx-ext1 passing 35 40 - db pin at 0.5db compression point 2 p -0.5db (2) tx-ant1, tx-ext1 passing 33.5 35.5 - dbm adjacent channel leakage power 5 acp 3 pdc standard, 50khz offset p in =30dbm, input signal acp=-67dbc @ 30dbm - -64 -60 dbc adjacent channel leakage power 7 acp 4 pdc standard, 100khz offset p in =30dbm, input signal acp=-76dbc @ 30dbm - -75 -70 dbc 2nd harmonics 2 2f 0 (2) input signal 2nd harmonics =-68dbc, p in =30dbm - -62 -60 dbc 3rd harmonics 2 3f 0 (2) input signal 2nd harmonics =-69dbc, p in =30dbm - -62 -60 dbc vswr3 vswr3 tx-ant1, tx-ext1 passing - 1.4 1.6 switching time3 t d3 ctl1~3 - 120 500 nsec f=1453mhz, t a =25 c , v dd =3.5v, v ss =-2.5v tested on pcb circuit as shown below insertion loss of each connectors, striplines, and capacitors are excluded. tx, rx, ant1, ant2, ext1 and ext2 are terminated to 50 w . ter1 and ter2 are connected to gnd through 5pfcapacitor.
njg1515avb2 - 6 - n electrical characteristics 5 [ 1.5ghz rx mode ] common condition: parameter symbol conditions min typ max units frequency range 4 fin4 1477 - 1501 mhz rx-ant1 insertion loss los s9 p in =10dbm - 0.80 0.95 db rx-ant2 insertion loss los s10 p in =10dbm - 0.80 0.95 db rx-ext1 insertion loss los s11 p in =10dbm - 1.00 1.15 db rx-ext2 insertion loss los s12 p in =10dbm - 0.80 0.95 db rx-ant1 isolation isl15 rx-ant2, rx-ext1, rx-ext2 passing, p in =10dbm 18 22 - db rx-ant2 isolation isl16 rx-ant1, rx-ext1, rx-ext2 passing, p in =10dbm 19 24 - db rx-ext1 isolation isl17 rx-ant1, rx-ant2, rx-ext2 passing, p in =10dbm 23 28 - db rx-ext2 isolation isl18 rx-ant1, rx-ant2, rx-ext1passing, p in =10dbm 17 22 - db pin at 1db compression point2 p - 1 (2) rx-ant1, rx-ant2, rx-ext1, rx-ext2 passing 20 26 - dbm vswr4 vswr4 rx-ant1, rx-ant2, rx-ext1, rx-ext2 passing - 1.4 1.6 switching time 4 t d4 ctl1~3 - 120 500 nsec f=1501mhz, t a =25 c , v dd =3.5v, v ss =0v tested on pcb circuit as shown below insertion loss of each connectors, striplines, and capacitors are excluded. tx, rx, ant1, ant2, ext1 and ext2 are terminated to 50 w . ter1 and ter2 are connected to gnd through 5pfcapacitor.
njg1515avb2 - 7 - n terminal information pin no. symbol descriptions 1 ctl2 high-i mpedance c-mos input terminal. this terminal is set to high-level by 2v~v dd , and low-level by +0.6v~0v. in case of open or unstable level, connect this terminal by 100k w resistor with gnd terminal or v dd terminal. 2 ctl3 high-i mpedance c-mos input terminal. this terminal is set to high-level by 2v~v dd , and low-level by +0.6v~0v. in case of open or unstable level, connect this terminal by 100k w resistor with gnd terminal or v dd terminal. 3 v ss negative voltage supply terminal. the negative voltage (-3.5~-2.0v) have to be supplied on transmitting. otherwise negative voltage of -2.5~0v can be used or this terminal can be stayed open, because internal level of this terminal is automatically set to gnd level on receiving. the bypass capacitor have to be connected with gnd terminal for excellent rf performance. 4 ext2 rf receiving port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 6 ext1 rf transmitting/receiving port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 8 tx rf transmitting port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 10 ter2 ant1 termination port. the influence of ant1 port to ant2 port is suppressed by terminating this port by an appropriate termination. an external capacitor (5pf) is required to block dc voltage (v dd ). 11 ant1 rf transmitting/receiving port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 13 rx rf receiving port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 15 ant2 rf receiving port. an external capacitor of 56pf~100pf is required to block dc voltage (v dd ). 17 ter1 ant2 termination port. the influence of ant2 port to ant1 port is suppressed by terminating this port with appropriate termination. an external capacitor (5pf) is required to block dc voltage (v dd ). 19 v dd positive voltage supply terminal. the positive voltage (2.7~5.0v) have to be supplied. the bypass capacitor have to be connected with gnd terminal for excellent rf performance. 20 ctl1 high-i mpedance c-mos input terminal. this terminal is set to high-level by 2v~v dd , and low-level by +0.6~0v. in case of open or unstable level, connect this terminal by 100k w resistor with gnd terminal or v dd terminal. 5,7,9,12, 14,16,18 gnd ground terminal. please connect this terminal with ground plane as close as possible for excellent rf performance.
njg1515avb2 - 8 - n typical characteristics (measured on the pcb evaluation circuit as shown below. all external circuit losses are included. please refer the table of estimated losses.) tx-ant1 insertion loss, tx port reflection (marker1: 940mhz, marker 2: 1453mhz) tx-ext1 insertion loss, tx port reflection (marker 1: 940mhz, marker 2: 1453mhz)
njg1515avb2 - 9 - n typical characteristics (continued ) rx-ant insertion loss, rx port reflection (marker 1: 885mhz, marker 2: 1501mhz) rx-ant2 insertion loss, rx port reflection (marker 1: 885mhz, marker 2: 1501mhz)
njg1515avb2 - 10 - n typical characteristics (continued ) rx-ext1 insertion loss, rx port reflection (marker 1: 885mhz, marker 2: 1501mhz) rx-ext2 insertion loss, rx port reflection (marker 1: 885mhz, marker 2: 1501mhz)
njg1515avb2 - 11 - n typical characteristics (800mhz band: measured on the pcb evaluation circuit) 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (tx-ant1, f=940mhz, v ss =-2.5v) pin=30dbm 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (tx-ext1, f=940mhz, v ss =-2.5v) pin=30dbm 30.0 32.0 34.0 36.0 38.0 40.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v p -0.5db (dbm) ambient temperature ( o c ) p -0.5db vs. ambient temperature vs. v dd (tx-ant1, f=940mhz, v ss =-2.5v) -70.0 -65.0 -60.0 -55.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v acp offset:+50khz (dbc) ambient temperature ( o c ) acp(+50khz) vs. ambient temperature vs. v dd (tx-ant1, f=940mhz, v ss =-2.5v) pin=30dbm 20 22 24 26 28 30 32 34 36 0 20 40 60 80 100 120 140 160 20 25 30 35 40 output power p out (dbm) current i dd (ua) input power p in (dbm) input power vs. output power,i dd (tx-ant1, f=940mhz, v dd =3.5v, v ss =-2.5v) p -0.5db = 36.2dbm 10 12 14 16 18 20 22 24 26 28 30 32 0 4 8 12 16 20 10 15 20 25 30 35 output power p out (dbm) current i dd (ua) input power p in (dbm) input power vs. output power,i dd (rx-ant1, f=885mhz, v dd =3.5v, v ss =0v) p -1db = 30.4dbm
njg1515avb2 - 12 - n typical characteristics (800mhz band: measured on the pcb evaluation circuit) 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ant1, f=885mhz, v ss =0v) pin=10dbm 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ant2, f=885mhz, v ss =0v) pin=10dbm 0.2 0.4 0.6 0.8 1.0 1.2 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ext1, f=885mhz, v ss =0v) pin=10dbm 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ext2, f=885mhz, v ss =0v) pin=10dbm
njg1515avb2 - 13 - n typical characteristics (1.5ghz band: measured on the pcb evaluation circuit) 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (tx-ant1, f=1453mhz, v ss =-2.5v) pin=30dbm 0.0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (tx-ext1, f=1453mhz, v ss =-2.5v) pin=30dbm 30.0 32.0 34.0 36.0 38.0 40.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v p -0.5db (dbm) ambient temperature ( o c ) p -0.5db vs. ambient temperature vs. v dd (tx-ant1, f=1453mhz, v ss =-2.5v) -70.0 -65.0 -60.0 -55.0 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v acp offset:+50khz (dbc) ambient temperature ( o c ) acp(+50khz) vs. ambient temperature vs. v dd (tx-ant1, f=1453mhz, v ss =-2.5v) pin=30dbm 20 25 30 35 0 50 100 150 20 25 30 35 40 output power p out (dbm) current i dd (ua) input power p in (dbm) input power vs. output power,i dd (tx-ant1, f=1453mhz, v dd =3.5v, v ss =-2.5v) p -0.5db = 35.8dbm 10 15 20 25 30 0 5 10 15 20 10 15 20 25 30 35 output power p out (dbm) current i dd (ua) input power p in (dbm) input power vs. output power,i dd (rx-ant1, f=1501mhz, v dd =3.5v, v ss =0v) p -1db = 30.0dbm
njg1515avb2 - 14 - n typical characteristics (1.5ghz band: measured on the pcb evaluation circuit) 0.2 0.4 0.6 0.8 1.0 1.2 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ant1, f=1501mhz, v ss =0v) pin=10dbm 0.2 0.4 0.6 0.8 1.0 1.2 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ant2, f=1501mhz, v ss =0v) pin=10dbm 0.4 0.6 0.8 1.0 1.2 1.4 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ext1, f=1501mhz, v ss =0v) pin=10dbm 0.2 0.4 0.6 0.8 1.0 1.2 -50 0 50 100 vdd=3.5v vdd=3.0v vdd=2.7v loss (db) ambient temperature ( o c ) loss vs. ambient temperature vs. v dd (rx-ext2, f=1501mhz, v ss =0v) pin=10dbm
njg1515avb2 - 15 - n truth table ? h ? =v ctl (h), ? l ? =v ctl (l) , ? x ? = h or l control input control output rx/tx diversity in/out route ctl1 ctl2 ctl3 sw1 sw2 sw3 sw4 sw5 sw6 sw7 sw8 sw9 tx- ant1 h x h off off off on on off off off on tx- ext 1 h x l off off on off on on on off off rx- ant 1 l l h off off on off on off on on on rx- ant2 l h h on off off off off on on on on rx- ext1 l l l off off off on on on off on off rx-ext2 l h l off on off off on on on on on n pin configuration (top view) 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 mark ant-sw d e cor der 1 sw4 sw4 sw3 sw2 sw9 sw8 sw1 ctl1 sw6 v dd gnd ter1 gnd ant2 gnd rx gnd ter2 gnd tx gnd ext1 gnd ext2 v ss ctl3 ctl2 ant1 sw5 sw7
njg1515avb2 - 16 - n recommended circuit (tx-ant1 passing) 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 mark ant-sw d e cor der c10 5pf c5 56pf c4 56pf c3 56pf 1 c2 1000pf r1 100k w r2 100k w (ter2) ant2 c7 56pf c6 56pf c9 5pf r3 100k w c1 1000pf v ctl2 0v/3v 0v/3v v ctl3 v ss -2.5v ext2 50 w 50 w 50 w ext1 tx rx v dd v ctl1 0v/3v 3.5v 50 w pcb 50 w 50 w sw1 sw7 sw4 sw4 sw6 sw8 sw9 sw5 sw2 ant1 sw3 c8 56pf (ter1)
njg1515avb2 - 17 - n recommended pcb design part id value comment r1~r3 100k w tama electronics (crg16g) c1, c2 1000pf murata (grm36) c3~c8 56pf murata (grm36) c9, c10 5pf murata (grm36) pcb: fr-4, t= 0.5mm stripline width: 1mm c9 c2 ext1 ext2 vctl2 c1 c4 c8 parts list tx ant1 njg1515avb2 1 vctl1 c6 c7 c3 c10 c5 rx ant2 r1 v dd v ss vctl3 gnd r3 r2 pass route 800mhz band (db) 1.5ghzband (db) tx-ant1 0.17 0.21 tx-ext1 0.18 0.21 rx-ant1 0.17 0.23 rx-ant2 0.19 0.25 rx-ext1 0.18 0.24 rx-ext2 0.19 0.25 board total loss (capacitor, connector and pcb) precautions [1] the b ypass capacitors should be connected to the v dd , v ss terminals as close as possible respectively. [2] for good rf performance , the gr ou nd terminal s should be directly connected to the ground pattern s and through-holes as close as possible using relatively wide pattern .
njg1515avb2 - 18 - n package outline (ssop20-b2) lead material : copper lead surface finish : solder plating molding material : epoxy resin unit : mm weight : 66mg caution s on using this product this product contains gallium- arsenide (gaas) which is a harmful material. do not eat or put in to mouth. do not dispose in fire or break up this product. do not chemically make gas or powder with this product . to wast e th is product, please obey the relati ng law of your country. this product may be damaged with electric static discharge (esd) or spike voltage. p lease hand le with care to avoid these damages . [caution] the specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

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